Dynamically manipulated interface polarization via symmetry engineering for self-gated electronics

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Jul 27, 2026 version files 2.02 MB

README.md

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Source_Data.zip

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Abstract

Interfaces have always been a key for functional devices in condensed-matter physics, which correlates distinctive phenomena, such as the piezotronics effect, triboelectric effect, photovoltaic effect, quantum Hall effect, etc. However, dynamic regulation of interfacial symmetry and the subsequent effects have still been largely underestimated, especially in bulk materials. Here, we show that the interfacial crystallographic symmetry can be precisely modulated by electric field-induced rearrangement of oxygen vacancies in bulk centrosymmetric semiconductors (TiO2, SrTiO3, etc.), resulting in significantly tunable interface polarization. Our results show that the interface polarization of a metal-semiconductor (MS) heterostructure can be reversibly modified in a nonvolatile manner, with a tunable electromechanical response varying from 6.79 to 9.07 pm/V, which is comparable to that of most common piezoelectric semiconductors (ZnO, GaN, MoS2, etc.). Owing to the tunable interface polarization, giant self-gated carrier transport in MS heterostructure is achieved, with a Schottky barrier tuned by 30.8 meV. Furthermore, the self-gated electronics greatly simplifies the complicated structures of logic devices, enabling the integration of logic and storage operations through programmable interface polarization. These findings offer a distinctive approach to design the interface symmetry and functionalities beyond the intrinsic limitations of bulk centrosymmetric materials.

We have submitted the raw data corresponding to each figure presented in the manuscript (Source_Data.zip). This compressed file comprises five files, corresponding respectively to the data presented in Figures 1, 2, 3, 4, and 5 of the manuscript.

Description

Source_Data.zip

Source Data Fig.1

Fig. 1D: The horizontal axis denotes the energy difference E-E_F, corresponding to the energy position with respect to the Fermi level. The vertical axis denotes the PDOS magnitude (a.u.) associated with the corresponding energy positions. To study the effects of electric field and charge doping on the electronic structure, the PDOS of Ag‑4d and Ti‑3d orbitals in the vicinity of the Fermi level are tabulated for both the original state and the electric‑field‑applied state, allowing a direct comparison of the density‑of‑states variations.

Ag-4d (Original state): The projected density of states (PDOS) of the 4d orbitals of Ag atoms prior to electric field application.
Ag-4d (Electric field on): The projected density of states (PDOS) of the Ag 4d orbitals after electric‑field‑induced migration of oxygen vacancies to the interface.
Ti-3d (Original state): The projected density of states (PDOS) of the 3d orbitals of Ti atoms prior to electric field application.
Ti-3d (Electric field on): The projected density of states (PDOS) of the Ti 3d orbitals after electric‑field‑induced migration of oxygen vacancies to the interface.
E-E_F (eV): The energy difference between the energy level (E) and the Fermi level (E_F) is expressed in electron volts (eV).
PDOS (a.u.): The relative values of the projected density of states.

① eV: electron volts; ② a.u.: The PDOS intensity on the y‑axis is given in arbitrary units, and only the relative values are considered for comparison.

Source Data Fig. 2

Fig. 2B: The data presented here illustrate the dependence of the potential gradient on the in‑plane DC bias voltage (V_DC). The sign of V_DC denotes the direction of the applied in‑plane electric field. The potential gradient is defined as positive when the potential increases along the positive V_DC direction, and negative otherwise. Owing to charge migration under the electric field, the potential gradient is positive under positive V_DC and negative under negative V_DC. In both cases, its magnitude increases with the applied field strength.
Fig. 2F: With increasing magnitude of the applied negative out‑of‑plane bias, the surface amplitude of the material, as measured by AFM under a constant small AC voltage, is reduced. Following each application of an out‑of‑plane bias, a selected area of the material was scanned to obtain an amplitude image. The pixel‑wise data from each image were subsequently pooled and fitted with a Gaussian function. The resulting Gaussian distributions represent the final two data columns. After Gaussian fitting of the data, the mean value and standard deviation were obtained.
Fig. 2G: Similar to Fig. 2F, the data table here presents the increase in surface amplitude induced by positive out‑of‑plane V_DC.
Fig. 2H: AFM is used here to characterize the surface potential. The statistical treatment of the surface potential data is the same as that for the amplitude data.
Fig. 2I: Similar to Fig. 2H, the data table here presents the increase in surface potential induced by positive out‑of‑plane V_DC.
Fig. 2J-M: Statistical analysis of the surface potential and PFM amplitude from two successive characterizations performed on the same region of the surface of a bulk TiO₂ crystal, with a 1 h interval between two measurements. The data plots obtained after the two measurements were processed in the same manner as those in Figs. 2F–I.

V_DC (V): The applied pre-polarization voltage.
Potential Gradient (kV m^-1): The variation of surface potential along the channel length under an applied in‑plane electric field. From left to right, the potential increases along the channel, meaning that the potential gradient is positive; conversely, it is negative.
Average: The weighted average of the data.
Standard Deviation: A measure of the dispersion or fluctuation of a set of data.
Amplitude (pm): The surface amplitude of the material measured by atomic force microscopy under an AC voltage.
Normalized Counts: The proportion of data points at a given value is shown, with the values having been normalized. The image contains 256 × 256 data points, each with a measured value. Multiple points may share the same value.
Surface potential (mV): The surface potential of the material measured by atomic force microscopy.
The first measurement: Two successive characterizations performed on the same region of the surface of a bulk TiO₂ crystal. This corresponds to the first round of characterization.
The second measurement: This corresponds to the second round of characterization.
Interval time: 1 h: To confirm the stability of the vacancy migration induced by the applied voltage on the surface potential and amplitude, the material was characterized both before and after voltage application, with the two measurements separated by a one‑hour interval.

① KV m^-1: kilovolts per meter ; ② pm: picometer; ③ V: Voltage; ④ mV: millivolt; ⑤: h: hour.

Source Data Fig. 3

Fig. 3B and D: I-V characterization of the device after applying 300 s negative (B) and positive (D) V_DC.
Fig. 3C and E: Variations of Schottky barrier height derived from the I-V curves in B and D, respectively.
Fig. 3F and H: I-t characteristics of the device after applying 300 s negative (F) and positive (H)ve V_DC.
Fig. 3G and I: Variations of Schottky barrier height derived from the stable state (t = 300 s) of the I-t curves in F and H, respectively.

Current-voltage scanning: The device current was measured while the voltage was gradually changed.
Voltage (V): Scanning voltage.
Current (μA): The device current at the corresponding scanning voltage.
Change of SBH (meV): Variations of Schottky barrier height derived from the I-V or I-t curves.
Time (s): The current as a function of time under a fixed readout voltage. The test was conducted over a period of 300 s.

① μA: microampere ; ② meV: millielectron volt; ③ s: second.

Source Data Fig. 4

Fig. 4A: I-V characteristics of the macroscopic device by a semiconductor parameter analyzer. Repeated I-V sweeps were applied over a voltage range of 1 V to –1 V. A total of 16 sweeps were performed.
Fig. 4B: I-V characteristics of the macroscopic device semiconductor parameter analyzer. Repeated I-V sweeps were applied over a voltage range of -1 V to 1 V. A total of 16 sweeps were performed.
Fig. 4C: Variation of Schottky barrier height derived from the I-V curves of macroscopic (A, B) measurements.
Fig. 4D: I-V characteristics of the microscopic device by AFM. Repeated I-V sweeps were applied over a voltage range of 10 V to –10 V. A total of 16 sweeps were performed.
Fig. 4E: I-V characteristics of the microscopic device by AFM. Repeated I-V sweeps were applied over a voltage range of -10 V to 10 V. A total of 16 sweeps were performed.
Fig. 4F: Variation of Schottky barrier height derived from the I-V curves of microscopic (D, E) measurements.

Repetitive I-V scanning of macroscopic device: I-V characteristics of macroscopic device.
1 V to -1 V and -1 V to 1 V: The scanning voltage applied during macroscopic electrical characterization using a semiconductor parameter analyzer.
1st - 16th: Number of repeated scans.
Scanning from 1 V to -1 V: Repeated I‑V measurements were performed by sweeping the voltage from 1 V to −1 V.
Scanning from -1 V to 1 V: Repeated I‑V measurements were performed by sweeping the voltage from -1 V to 1 V.
Scanning times:The number of repeated I‑V sweeps performed.
Repetitive I-V scanning of microscopic device: I-V characteristics of microscopic device.
10 V to -10 V and -10 V to 10 V: The scanning voltage applied during microscopic electrical characterization by atomic force microscopy.
Scanning from 10 V to -10 V: Repeated I‑V measurements were performed by sweeping the voltage from 10 V to −10 V.
Scanning from -10 V to 10 V: Repeated I‑V measurements were performed by sweeping the voltage from -10 V to 10 V.

Source Data Fig. 5

Fig. 5D-G: Logic operations and experimental truth table of the self-gated logic element (D), inverter (E), NAND (F), and XOR (G). The resistance variation of the fabricated logic device in response to changes in the electrical input signals applied across its two terminals. The resistance values listed in each table represent the actual device resistance, which varies with the applied external electrical input signals.

Self-gated logic element (Ω): Self‑gated electronic device based on the self‑gated effect.
Inverter (Ω): Self‑gating‑effect‑based logic inverter.
NAND (Ω): A NAND logic gate based on the self‑gating effect.
XOR (Ω): A XOR logic gate based on the self‑gating effect.

① Ω: ohms.

Code/software

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