Data from: An open-source benchmark suite of 3D-IC testcases
Data files
Sep 03, 2026 version files 85.83 MB
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3Dblox_Designs.zip
85.82 MB
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README.md
2.17 KB
Abstract
We introduce an open-source benchmark suite for 3D IC design, developed from representative chiplet-based case studies presented in "CATCH: A Cost Analysis Tool for Co-optimization of Chiplet-Based Heterogeneous Systems", an open-source framework for cost analysis of heterogeneous integration architectures. The suite consists of reusable, parameterized virtual chiplet models spanning compute, memory, I/O, analog, and substrate components. The included testcases are designed to represent key physical-design aspects of 3D systems, such as heterogeneous die stacking, inter-die connections, and technology-specific design requirements. Through the public release of these benchmarks, we seek to provide a shared evaluation resource for the research community and facilitate reproducible and systematic studies of 3D heterogeneous integration.
Dataset DOI: 10.5061/dryad.76hdr7tb6
Description of the data and file structure
The benchmark suite is organized into two phases:
(1) a reusable library of parameterized chiplet models and (2) a set of system-in-package designs constructed from these models. All testcases are represented using the CATCH XML schema and support various 2.5D/3D integration features, including stack hierarchies, front- and back-side connectivity, TSV pass-throughs, buried dies, and substrate routing constraints.
Files and variables
From 3Dblox_Designs.zip, the 20 benchmark designs (D0--D19) are grouped into four categories:
foundational 2.5D configurations (D1--D4), basic 3D integration and stacking (D0, D5--D8), complex heterogeneous systems (D9--D13), and parameter-perturbed designs for evaluating congestion, NRE amortization, assembly processes, placement regularity, and chiplet-count scaling (D14--D19).
Code/software
The benchmark designs can be viewed and evaluated using the open-source OpenROAD digital design automation flow.
Citation
This dataset contains the 20 3D-IC benchmark designs described in the associated arXiv paper.
If you use these designs, benchmark data, or other materials from this dataset, please cite both the associated arXiv paper and this Dryad dataset.
Associated arXiv Paper
[Rohan Soni, Jooyeon Jeong, Alexander Graening, Anthony Foo, Richard Chen, Puneet Gupta]. (2026). [An Open-Source Benchmark Suite of 3D-IC Testcases]. arXiv preprint. [https://doi.org/10.48550/arXiv.2608.25155]
Dryad Dataset
Dataset DOI: 10.5061/dryad.76hdr7tb6
Relationship Between the Paper and Dataset
The associated arXiv paper describes the motivation, methodology, design generation, and evaluation of the 20 3D-IC benchmark designs. This Dryad repository provides the corresponding design files and supporting materials for public access and reuse.
When referencing the benchmark designs in academic work, please cite both the arXiv paper and this Dryad dataset.